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july 2009 doc id 13494 rev 5 1/34 1 vnq5e050k-e quad channel high side driv er for automotive applications features general ? inrush current active management by power limitation ? very low stand-by current ? 3.0 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromag netic susceptibility ? in compliance with the 2002/95/ec european directive diagnostic functions ? open drain status output ? on-state open-load detection ? off-state open-load detection ? output short to vcc detection ? overload and short to ground (power limitation) indication ? thermal shutdown indication protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? over temperature shutdown with auto restart (thermal shutdown) ? reverse battery protected (see application schematic (1) on page 22 ) ? electrostatic discharge protection applications all types of resistive, inductive and capacitive loads description the vnq5e050k-e is a quad channel high-side driver manufactured in the st proprietary vipower? m0-5 technology and housed in the tiny powersso-24 package. the vnq5e050k-e is designed to drive automotive grounded loads delivering protection, diagnostics and an easy 3 v and 5 v cmos compatible interface with any microcontroller. the device integrates advanced protective functions such as load cu rrent limitatio n, inrush and overload active management by power limitation, over temperature shut-off with auto restart and over-voltage active clamp. a dedicated active low digital status pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over temperature indication, short-circuit to v cc diagnosis and on & off-state open-load detection. the diagnostic feedback of the whole device can be disabled by pulling th e stat_dis pin up, thus allowing wired-oring with other similar devices. max transient supply voltage v cc 41v operating voltage range v cc 4.5 to 28v max on-state resist ance (per ch.) r on 50 m current limitation (typ) i limh 27 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-24 www.st.com
contents vnq5e050k-e 2/34 doc id 13494 rev 5 contents 1 block diagram and pin co nfiguration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . . 22 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . . 22 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.5 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 25 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.1 powersso-24 package packing information . . . . . . . . . . . . . . . . . . . . . . 31 7 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
vnq5e050k-e list of tables doc id 13494 rev 5 3/34 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc=13v, t j = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. status pin (vsd=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. open-load detection (8v list of figures vnq5e050k-e 4/34 doc id 13494 rev 5 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 10. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 11. open-load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 12. open-load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 13. short to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 15. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. low level stat_dis current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. high level stat_dis current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. i lim vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 27. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 28. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 29. stat_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 30. high level stat_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 31. low level stat_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 32. application schematic (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 33. open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 34. maximum turn-off current versus inductance (for each channel) (1) . . . . . . . . . . . . . . . . . . 25 figure 35. powersso-24 pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 36. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 26 figure 37. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 27 figure 38. thermal fitting model of a double channel hsd in powersso-24 (1) . . . . . . . . . . . . . . . . . 27 figure 39. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 40. powersso-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 41. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
vnq5e050k-e block diagram and pin configuration doc id 13494 rev 5 5/34 1 block diagram and pin configuration figure 1. block diagram table 1. pin function name function v cc battery connection. outputn power output. gnd ground connection. must be reverse battery protected by an external diode/resistor network. inputn voltage controlled input pin with hysteresis , cmos compatible. controls output switch state. statusn open drain digital diagnostic pin. stat_dis active high cmos compatible pin, to disable the status pin. v cc ch 1 control & diagnostic 1 logic driver v on limitation current limitation power clamp off state open load over temp. undervoltage ch 3 ch 4 ch 2 overload protection (active power limitation) in1 in2 in3 in4 st1 st2 st3 st4 st_ dis gnd out4 out3 out2 out1 signal clamp control & diagnostic channels 2, 3 & 4 on state open load
block diagram and pin configuration vnq5e050k-e 6/34 doc id 13494 rev 5 figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin status n.c. output input stat_dis floating x x x x x to ground not allowed x not allowed through 10k resistor through 10k resistor input2 status2 gnd v cc input1 status1 stat_dis. v cc status3 input3 input4 status4 output2 output2 output1 output1 output1 output2 output4 output4 output3 output3 output3 output4 tab = v cc
vnq5e050k-e electrical specifications doc id 13494 rev 5 7/34 2 electrical specifications figure 3. current and voltage conventions (1) 1. v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. v fn i gnd v cc gnd outputn stat_dis i sd inputn i inn v sd v inn i outn v outn statusn i statn v statn v cc i s table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage 0.3 v - i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a - i out reverse dc output current 15 a i in dc input current +10/-1 ma i stat dc status current +10/-1 ma i stat_dis dc status disable current +10/-1 ma e max maximum switching energy (single pulse) (l= 3mh; r l =0 ; v bat =13.5v; t jstart =150oc; i out = i liml (typ.)) 104 mj
electrical specifications vnq5e050k-e 8/34 doc id 13494 rev 5 2.2 thermal data v esd electrostatic discharge (human body model: r=1.5k ; c=100pf) ? input ? status ?stat_dis ? output ?v cc 4000 4000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature - 55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction-case (max) (with one channel on) 2.8 c/w r thj-amb thermal resistance junction-ambient (max) see figure 36 c/w
vnq5e050k-e electrical specifications doc id 13494 rev 5 9/34 2.3 electrical characteristics values specified in this section are for 8 v electrical specifications vnq5e050k-e 10/34 doc id 13494 rev 5 table 7. status pin (v sd =0) symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat = 1.6 ma, v sd =0v 0.5 v i lstat status leakage current normal operation or v sd =5v, v stat = 5v 10 a c stat status pin input capacitance normal operation or v sd =5v, v stat = 5v 100 pf v scl status clamp voltage i stat = 1ma i stat = - 1ma 5.5 -0.7 7v v table 8. protections (1) 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13v 5vt tsd (see figure 4. )20s v demag turn-off output voltage clamp i out = 2a; v in = 0; l= 6mh v cc -41 v cc -46 v cc -52 v v on output voltage drop limitation i out = 0.1a (see figure 5. ) t j = -40c...+150c 25 mv
vnq5e050k-e electrical specifications doc id 13494 rev 5 11/34 table 9. open-load detection (8v electrical specifications vnq5e050k-e 12/34 doc id 13494 rev 5 figure 4. status timings figure 5. output voltage drop limitation v in v stat t pol open load status timing (without external pull-up) i out < i ol v out < v ol t dol(on) v in v stat open load status timing (with external pull-up) i out < i ol v out > v ol t dol(on) v in v stat over temp status timing t sdl t sdl t j > t tsd v in v stat t dstkon output stuck to vcc i out > i ol v out > v ol t dol(on) v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
vnq5e050k-e electrical specifications doc id 13494 rev 5 13/34 figure 6. switching characteristics table 11. truth table conditions inputn outputn statusn (v sd =0v) (1) 1. if the v sd is high, the status pin is in a high impedance. normal operation l h l h h h over temperature l h l l h l undervoltage l h l l x x overload & short to gnd h h x (no power limitation) cycling (power limitation) h l output voltage > v ol l h h h l (2) h 2. the status pin is low with a delay equal to t dstkon after input falling edge. output current < i ol l h l h h (3) l 3. the status pin becomes hi gh with a delay equal to t pol after input falling edge. v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
electrical specifications vnq5e050k-e 14/34 doc id 13494 rev 5 table 12. electrical transient requirements (part 1/3) iso 7637-2: 2004(e) test pulse test levels number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv 1 -75 v -100 v 5000 pulses 0.5 s 5 s 2 ms, 10 2a +37 v +50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a -100 v -150 v 1h 90 ms 100 ms 0.1 s, 50 3b +75 v +100 v 1h 90 ms 100 ms 0.1 s, 50 4 -6 v -7 v 1 pulse 100 ms, 0.01 5b (1) 1. valid in case of external load dump clamp: 40 v maximum referred to ground. +65 v +87 v 1 pulse 400 ms, 2 table 13. electrical transient requirements (part 2/3) iso 7637-2: 2004(e) test pulse test level results (1) 1. the above test levels must be considered re ferred to vcc= 13.5 v except for pulse 5b. iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (2) 2. valid in case of external load dump clamp: 40 v maximum referred to ground. cc table 14. electrical transient requirements (part 3/3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
vnq5e050k-e electrical specifications doc id 13494 rev 5 15/34 2.4 waveforms figure 7. normal operation figure 8. undervoltage shutdown i out v status v st_dis input nominal load nominal load normal operation i out v status v st_dis input v cc v usd v usdhyst undefined undervoltage shut-down
electrical specifications vnq5e050k-e 16/34 doc id 13494 rev 5 figure 9. overload or short to gnd figure 10. intermittent overload power limitation i limh > i liml > i out v status v st_dis input thermal cycling overload or short to gnd i out v status v st_dis input i limh > nominal load intermittent overload i liml > overload
vnq5e050k-e electrical specifications doc id 13494 rev 5 17/34 figure 11. open-load with external pull-up figure 12. open-load without external pull-up v pu > v ol t dol(on) open load with external pull-up v ol i out v status v st_dis input v out t dol(on) i ol t pol open load without external pull-up i out < i ol i out v status v st_dis input v out
electrical specifications vnq5e050k-e 18/34 doc id 13494 rev 5 figure 13. short to v cc figure 14. t j evolution in overload or short to gnd v out > v ol t dstk(on) i out > i ol i out < i ol v out > v ol t dol(on) resistive short to v cc hard short to v cc short to v cc i out v status v st_dis input v out v ol i ol t tsd t r t j evolution in overload or short to gnd i limh > < i liml t j_start t hyst power limitation self-limitation of fast thermal transients input i out t j
vnq5e050k-e electrical specifications doc id 13494 rev 5 19/34 2.5 electrical char acteristics curves figure 15. off-state output current figure 16. high level input current figure 17. input clamp voltage figure 18. input high level voltage figure 19. input low level voltage figure 20. low level stat_dis current -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 iloff (na) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iih (a) vin=2.1v -50 -25 0 25 50 75 100 125 150 175 tc (c) 5 5,2 5,4 5,6 5,8 6 6,2 6,4 6,6 6,8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 isdl (a) vsd= 0.9v
electrical specifications vnq5e050k-e 20/34 doc id 13494 rev 5 figure 21. on-state resistance vs t case figure 22. high level stat_dis current figure 23. on-state resistance vs v cc figure 24. low level input current figure 25. i lim vs t case figure 26. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 ron (mohm) iout= 2a vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 isdh (a) vsd= 2.1v 0 5 10 15 20 25 30 35 40 vcc (v) 0 20 40 60 80 100 ron (mohm) tc=-40c tc=25c tc=125c tc=150c -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iil (a) vin=0.9v -50 -25 0 25 50 75 100 125 150 175 tc (c) 10 15 20 25 30 35 40 ilimh (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt )on (v/ms) vcc=13v ri=6.5 ohm
vnq5e050k-e electrical specifications doc id 13494 rev 5 21/34 figure 27. undervoltage shutdown figure 28. turn-off voltage slope figure 29. stat_dis clamp voltage figure 30. high level stat_dis voltage figure 31. low level stat_dis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 600 (dvout/dt )off (v/ms) vcc=13v ri= 6.5 ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 vsdcl(v) isd = 1 ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 vsdh(v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 vsdl(v)
application information vnq5e050k-e 22/34 doc id 13494 rev 5 3 application information figure 32. application schematic (1) 1. channels 2, 3 and 4 have the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / (i s(on)max ). 2) r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize solution 2 (see below). v cc gnd outputn d gnd r gnd d ld c +5v v gnd stat_dis inputn r prot r prot r prot +5v statusn
vnq5e050k-e application information doc id 13494 rev 5 23/34 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd =1k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network will produce a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares t he same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds to v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/o s (input levels compatibility) with the latch-up limit of c i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v oh c 4.5v 5k r prot 180k . recommended r prot value is 10k . 3.4 open-load detecti on in off-state off-state open-load detection requires an external pull-up resistor (r pu ) connected between output pin and a positive supply voltage (v pu ) like the +5v line used to supply the microprocessor. the external resistor has to be selected according to the following requirements:
application information vnq5e050k-e 24/34 doc id 13494 rev 5 1) no false open-load indication when load is connected: in this case we have to avoid v out to be higher than v olmin ; this results in th e following condition v out =(v pu /(r l +r pu ))r l vnq5e050k-e application information doc id 13494 rev 5 25/34 3.5 maximum demagnetization energy (v cc =13.5v) figure 34. maximum turn-off current versus inductance (for each channel) (1) 1. values are generated with r l =0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. demagnetization demagnetization demagnetization t v in , i l c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse 1 10 100 0,1 1 10 100 l (mh) i (a) a b c
package and pcb thermal data vnq5e050k-e 26/34 doc id 13494 rev 5 4 package and pcb thermal data 4.1 powersso-24 thermal data figure 35. powersso-24 pc board (1) 1. layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area= 77mm x 86mm, pcb thickness=1.6mm, cu thickness=70 m (f ront and back side), copper areas: from minimum pad lay-out to 8cm 2 ). figure 36. r thj-amb vs pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
vnq5e050k-e package and pcb thermal data doc id 13494 rev 5 27/34 figure 37. powersso-24 thermal impedan ce junction ambient single pulse (one channel on) figure 38. thermal fitting model of a double channel hsd in powersso-24 (1) 1. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zt h (c/w) footprint 8 cm 2 2 cm 2
package and pcb thermal data vnq5e050k-e 28/34 doc id 13494 rev 5 equation 1: pulse calculation formula where = t p /t table 15. thermal parameter area/island (cm 2 )footprint28 r1 = r7 = r9 = r11 (c/w) 0.4 r2 = r8 = r10 = r12 (c/w) 2 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 c1 = c7 = c9 = c11 (w.s/c) 0.001 c2 = c8 = c10 = c12 (w.s/c) 0.0022 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17 z th r th z thtp 1 ? () + ? =
vnq5e050k-e package information doc id 13494 rev 5 29/34 5 package information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 package mechanical data figure 39. powersso-24 package dimensions
package information vnq5e050k-e 30/34 doc id 13494 rev 5 table 16. powersso-24? mechanical data symbol millimeters min typ max a 2.45 a2 2.15 2.35 a1 0 0.1 b0.33 0.51 c0.23 0.32 d 10.10 10.50 e7.4 7.6 e0.8 e3 8.8 f2.3 g 0.1 h 10.1 10.5 h 0.4 k0 8 l0.55 0.85 o1.2 q0.8 s2.9 t3.65 u1.0 n 10 x4.1 4.7 y6.5 7.1
vnq5e050k-e packing information doc id 13494 rev 5 31/34 6 packing information 6.1 powersso-24 packag e packing information figure 40. powersso-24 tube shipment (no suffix) figure 41. powersso-24 tape and reel shipment (suffix ?tr?) a c b all dimensions are in mm. base q.ty 49 bulk q.ty 1225 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 all dimensions are in mm. base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.05) 1.55 hole diameter d1 (min) 1.5 hole position f ( 0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
order codes vnq5e050k-e 32/34 doc id 13494 rev 5 7 order codes table 17. device summary package order codes tube tape and reel powersso-24 vnq5e050k-e VNQ5E050KTR-E
vnq5e050k-e revision history doc id 13494 rev 5 33/34 8 revision history table 18. document revision history date revision changes july-2006 1 initial release may-2007 2 document rewritten, restructured and put in corporate technical literature template. operative vcc range changed from 36 v to 28 v. tables 6, 12 updated. 04-feb-2008 3 document restructured. changed description on cover page. table 9: open-load detection (8v vnq5e050k-e 34/34 doc id 13494 rev 5 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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